[quote]"In my 34 years in the semiconductor industry, I have witnessed the advertised death of Moore’s Law no less than four times. As we progress from 14 nanometer technology to 10 nanometer and plan for 7 nanometer and 5 nanometer and even beyond, our plans are proof that Moore’s Law is alive and well," Krzanich stated in a blog post outlining Intel's plans.[/quote]
IIRC the smallest you can go is 3nm, right? At that spread the electrons start doing weird shit and jumping gates or something?
Intel totally isn't saying this because they had mixed quarterly reports. :rolleyes:
I mean they're not doing 'bad' by any margin, but they didn't hit what they expected to.
[url]http://www.intc.com/releasedetail.cfm?ReleaseID=965822[/url]
[QUOTE=Code3Response;50206900]IIRC the smallest you can go is 3nm, right? At that spread the electrons start doing weird shit and jumping gates or something?[/QUOTE]
I expect we'll manage 1nm with the CMOS process but below that I'm not optimistic, the absolute minimum is around 0.18nm for atomic scale transistors.
[QUOTE=Code3Response;50206900]IIRC the smallest you can go is 3nm, right? At that spread the electrons start doing weird shit and jumping gates or something?[/QUOTE]
Quantum tunneling is already becoming a factor at our current process node
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