Class-action suit filed against AMD over advertised number of cores in its Bulldozer chips
55 replies, posted
This is bullshit.
Every chip manufacturer that has ever existed that implemented a form of SMT has marketed it this way.
From the point of view of the OS and the consumer, the chip has 8 cores, although two are paired together with the same instruction fetch, and share execute resources.
The problem is, the average consumer only knows HOW MANY CORES? where it used to be... HOW MANY GHZ?
Maybe it is time to start listing all those specs when you shop at Best Buy. We can list where the cache is shared, how many instruction slots there are, how many pipeline stages....
[editline]9th November 2015[/editline]
[QUOTE=Levelog;49083131]Yeah, you could argue that the design greatly impacts performance, because it does, but by pretty much every engineering definition of a core it has 8. Though when explaining the drawbacks and benefits to those less knowledgeable I tend to refer to them by their module count and explain the module setup. It generally just helps people understand it better.[/QUOTE]
Makes the design more efficient. It's impossible to say it impacts performance without looking at the architecture as a whole. Companies are once again moving away from 'multicore' because it just leaves more and more of the chip dark.
[QUOTE=old_hag12;49083158]This is bullshit.
Every chip manufacturer that has ever existed that implemented a form of SMT has marketed it this way.
From the point of view of the OS and the consumer, the chip has 8 cores, although two are paired together with the same instruction fetch, and share execute resources.
The problem is, the average consumer only knows HOW MANY CORES? where it used to be... HOW MANY GHZ?
Maybe it is time to start listing all those specs when you shop at Best Buy. We can list where the cache is shared, how many instruction slots there are, how many pipeline stages....
[editline]9th November 2015[/editline]
Makes the design more efficient. It's impossible to say it impacts performance without looking at the architecture as a whole. Companies are once again moving away from 'multicore' because it just leaves more and more of the chip dark.[/QUOTE]
Honestly it seems that even in phones that well engineered dual core parts (the apple Ax series SoCs) are vastly preferable to slower multi core designs. A dual core apple part out benches every other multi-core ARM chip in existence, due to its high frequency and IPC, while still getting stellar battery life. Focusing on a multi core arch with weak cores assumes that software will be sufficiently (and efficiently) threaded to the point where it will run good, even in software where it is difficult or doesn't make sense to have a highly engineered multi-thread solution.
Intel also doesn't market their parts in the same way AMD does, for instance an i7 is a quad core with hyper-threading, not an octo core processor. AMD on the other hand has been known to market their processors by the number of "compute cores" they have, bundling the GPU cores into the CPU core count on APU marketing materials, which is wrong at best and deceptive at worst. The flaws on the AMD core design aren't worth calling out specifically other than for just being bad.
[QUOTE=Passing;49082137]Alright. How much memory does your computer have per stick?[/QUOTE]
2 Sticks marketed at 8GB each.
Actual size=8192MB = 8000MiB = 8 GiB.
I dont see any problem here, you never get less then what was advertised.
I really dont care. Im the average consumer who asks him self "does it turn on?" when I use a computer. I do not think this will go far.
[QUOTE=JohhnyCarson;49083959]I really dont care. Im the average consumer who asks him self "does it turn on?" when I use a computer. I do not think this will go far.[/QUOTE]
Dont underestimate how many people actually know about these parts. Even the "does it turn on people" are taking advise from someone tech savvy somewhere who knows about this problem. This can affect a great deal of sales.
Then again, the benchmarks already showed the bulldozers to suck for everything but heavy multithreaded applications (read video editing/photoshop). So they are not really popular for your average consumer anyway. Which is caused by tech savvy people advising against them, and followed/caused by PC builders just not using the CPU in their laptops/desktops.
The only reason I can think of something like this is an intel agent trying to bull doze AMD into oblivion.
Personally I use old computers. My computing needs are not that intense.
[QUOTE=Mitsuma;49081932]AMD did some false advertisement here. They don't have 8 cores, its more like 1.5 cores 4x.
It is also not the same as Intel's Hyperthreading and such can't be advertised as 8 cores.
(I'm also not aware that Intel i7-CPU's (4C/8T) really get advertised as 8 cores, could be wrong tho.)
AMDs "Bulldozer Modules" are not 2 real cores in ones. They have two integer units each, but share one cache and one floating point unit, thus [b]in a strict sense are not 2 cores[/b] but could do a bit more than 1 core.
The performance of Bulldozer is known to be pretty mediocre.
And don't forget, they basically fooled a lot of average customers that way because when people buy a all-in-one PC they see AMD 8 Core and probably expect a lot more than what they got.
8 Core AMD sure looks better on a PC then an Intel 4 Core with "Hyperthreading".[/QUOTE]
By whose definition?
[QUOTE=GoDong-DK;49086554]By whose definition?[/QUOTE]
Good point. Core is the a shitty meaningless word by now. In my own opinion, a 'core' must have a single instruction fetch. How many threads that core can fetch from at a single time is where people get confused.
[QUOTE=taipan;49083956]2 Sticks marketed at 8GB each.
Actual size=8192MB = 8000MiB = 8 GiB.
I dont see any problem here, you never get less then what was advertised.[/QUOTE]
Well. You'll always have a smaller amount of physical memory then you'll have a virtual that gives you a bit more after all that's what DDR does.
[QUOTE=Passing;49086646]Well. You'll always have a smaller amount of physical memory then you'll have a virtual that gives you a bit more after all that's what DDR does.[/QUOTE]
can you elaborate?
[QUOTE=Passing;49086646]Well. You'll always have a smaller amount of physical memory then you'll have a virtual that gives you a bit more after all that's what DDR does.[/QUOTE]
[QUOTE=Snickerdoodle;49086804]can you elaborate?[/QUOTE]
This is not the reason.
Right now there are two definitions for what MEGA-, GIGA- stand for.
Obviously the scientific community would say Mega and Giga represent powers of 10 therefore you get 1 Mega = 1000 'bytes'.
In the engineering community however, we say Mega is 1024 = 2^10. This is because numbers are stored as binary, and therefore memory is designed to have address spaces that resolve to powers of 2.
This problem has actually been resolved with the 'mebibyte' but engineers have, for all intensive purposes, not adopted this term
[QUOTE=old_hag12;49087494]This is not the reason.
Right now there are two definitions for what MEGA-, GIGA- stand for.
Obviously the scientific community would say Mega and Giga represent powers of 10 therefore you get 1 Mega = 1000 'bytes'.
In the engineering community however, we say Mega is 1024 = 2^10. This is because numbers are stored as binary, and therefore memory is designed to have address spaces that resolve to powers of 2.[/QUOTE]
Hence the reason we are moving to Gibibyte (GiB) and Gigabyte (GB)
[QUOTE=Levelog;49087519]Hence the reason we are moving to Gibibyte (GiB) and Gigabyte (GB)[/QUOTE]
I'd be surprised if the terms actually catch on.
[QUOTE=old_hag12;49087544]I'd be surprised if the terms actually catch on.[/QUOTE]
I could see the abbreviation of it catch on no problem. The full pronunciation however...
"Gibibite" sounds like baby blabber words tbh
[QUOTE=Passing;49086646]Well. You'll always have a smaller amount of physical memory then you'll have a virtual that gives you a bit more after all that's what DDR does.[/QUOTE]
DDR stands for Dual Data Rate. Which means that the memory can be read 2 times per clock cycle.
It has nothing to do with the size of the memory.
Virtual memory is a term for your computer using your hard disk as RAM if you dont have enough RAM to run an application. This function is only used if your normal ram is full and results in slower respons times.
I dont get how this would fall under false advertisement. Its like saying: this car is advertised for having room for 5 bags. But thats false advertisement because I can also put a sixt on the roof.
its false advertising when amd does it(even though its not)
but 3.5gb instead of the advertised 4gb is ok because its just .5gb
[QUOTE=Map in a box;49089656]its false advertising when amd does it(even though its not)
but 3.5gb instead of the advertised 4gb is ok because its just .5gb[/QUOTE]
970s have 4 GB though.
This highlights the underlying issue though; whatever sticker is slapped on something to entice consumers isn't ever going to tell the full story, and more to the point no one should be buying a produce purely based on the bullet point feature list.
Benchmarks and reviews exist, and people should look at those rather than going oooh, 4 GB or 8 cores or whatever and buying a product just based on that because there's so many ways companies can twist those things.
[QUOTE=old_hag12;49087544]I'd be surprised if the terms actually catch on.[/QUOTE]
Gibibytes has been used everywhere except Windows for a long time. Only Microsoft has refused to adopt the term so far, out of every major OS that I know of.
[QUOTE]The binary prefix mebi was defined by the International Electrotechnical Commission (IEC) in December 1998. The use of the binary prefixes to replace metric prefixes has been endorsed by all major international standards bodies[/QUOTE]
[QUOTE=Gmod4ever;49081290]So, wait. Correct me if I'm wrong here.
Is this proposing that the Bulldozer chip has eight physical cores, but they only behave like four logical cores?
Like, the opposite of Intel's hyperthreading, with four physical cores behaving like eight logical cores?
What the hell is this? Hypothreading? :v:[/QUOTE]
No, they're not the same.
Hyperthreading is method that allows a single core to rapidly switch between two contexts, but in the end you still have the same number of symmetric core and they can all be active at the same time.
In the case of AMD, one core can only execute one context, and eight symmetric cores exist. However, not all cores can be active at the same time.
[QUOTE=B!N4RY;49092289]
In the case of AMD, one core can only execute one context, and eight symmetric cores exist. However, not all cores can be active at the same time.[/QUOTE]
Uh... no. That would make the architecture a pile of crap.
[QUOTE=B!N4RY;49092289]No, they're not the same.
Hyperthreading is method that allows a single core to rapidly switch between two contexts, but in the end you still have the same number of symmetric core and they can all be active at the same time.
In the case of AMD, one core can only execute one context, and eight symmetric cores exist. However, not all cores can be active at the same time.[/QUOTE]
That's not quite correct on either count. To get the full picture you have to drill down to what's within a CPU. (I think you personally know these details and were just giving the short version, but it was a misleadingly incorrect short version, so I'm clearing things up for other people).
A "core" contains certain elements: an instruction decoder, several execution units (each of which can process only certain types of instructions), and usually some types of cache and buffers. In a superscalar processor, those multiple execution units can process instructions from a single thread in parallel - if the code is an integer add followed by a floating-point multiply on separate data, it will process both simultaneously. Every PC core since (IIRC) the Pentium Pro and K5 (from Intel and AMD, respectively) has been superscalar, so that's pretty ubiquitous at this point in the PC realm. Even most mobile ARM cores are superscalar now.
An Intel "big" core* (Nehalem/Westmere, Sandy/Ivy Bridge, Haswell/Broadwell, Skylake) contains an instruction decoder capable of decoding four instructions at once, at least three integer units, one or two floating-point units, at least three load/store units, a 32KiB L1 data cache, a 32KiB L1 instruction cache, and a 256KiB L2 unified cache.
An Intel core with HyperThreading will decode two instructions each from two threads at once (except when one is blocked on memory, when it will decode four from the remaining one). Those instructions go into the same reorder buffer, and wait for the necessary execution unit to be available. If possible, both threads can run at the same time - because there are redundant execution units, you can literally have two of the same instruction from both threads running (Haswell/Broadwell/Skylake can execute a peak of eight instructions at once, if the instruction mix is perfect). It does not "alternate" between them except when resources are scarce - if both are trying to execute something non-redundant, like a series of divides.
An AMD "big" core (Bulldozer, Piledriver, Steamroller, Excavator) contains one instruction decoder capable of decoding two instructions at once, two integer units, two load/store units, 16KiB of L1 data cache, and 64KiB of L1 instruction cache. Every two-core "module" also contains two floating-point units (with a weird ability for them to couple for processing extremely wide SIMD instructions) and 2MiB of L2 unified cache.
An AMD module is not able to be broken apart - it is an absolutely contiguous unit. That's why there are no triple-core AMD CPUs on Bulldozer-derived architectures, like there were under K10 - that would require one-and-a-half modules, which is simply impossible. And if you look at the total available resources, an AMD "module" is roughly as powerful as an Intel "core" - same instruction decode rate, about the same number of execution units, and similar cache sizes (except for the L2 cache, but Intel's L2 cache is a lot faster than AMD's larger cache).
However, if you feed an Intel "core" only one thread (either because HyperThreading is disabled, or the OS only schedules tasks on one logical CPU), it can devote more resources towards that one thread. This runs up against diminishing returns, because threads ultimately have some sequential limits, but it does run that one thread faster. With an AMD module, disabling the second "core" does not give all of its resources to the other. The L1 caches, integer units, and load/store units of the disabled core sit idle - up to (IIRC) Steamroller, even the second decoder did nothing! You get some benefit from the L2 cache and less contention for the FPUs, but that's not significant.
The only time AMD "cores" have to fight for resources is when one is issuing AVX instructions - extremely wide SIMD instructions that tie up both floating-point units. If you have two processes issuing such instructions, scheduled by the OS to cores that belong to the same module, they will run at half the speed they would had they been scheduled to cores on different modules. In my opinion that isn't enough to hit them for false advertising, because you'd have that same problem under Intel if scheduled to the same physical core**. That said, they clearly relied on customers not knowing that "cores" can be weaker or stronger, positioning their "eight-core" chips to fight Intel's quad-core chips.
And if you're going to sue for that, you also desperately need to sue the moron smartphone makers who count GPUs or camera ISPs as "cores", or count all cores in big.LITTLE clusters (where only one cluster can be active at a time), to get stupid numbers like "twelve cores" in a quad-core phone SoC.
* Both Intel and AMD have a "small" core architecture - Intel has their Atom line, and AMD has Bobcat. These are smaller, slower, but more efficient designs that do not share much with their "big" cousins.
** This is a contrived scenario; any supported OS is aware of the difference between logical and physical cores, and will scheduled processes to run on different cores first, filling all of them up before scheduling tasks on the second logical cores. When these architectures were brand-new, patches were required for this to happen - with AMD suffering in particular - but anything after Windows 7 will do this out of the box.
*** Oh, and while I'm writing footnote after footnote, this kind of thing is not limited to only two threads per physical core. IBM's POWER architecture works very much like HyperThreading, but with four threads, and Sun's SPARC-T design uses something similar to how B!nary originally described things - processing an instruction from one thread out of eight, sequentially, skipping over any thread waiting on a memory operation to continue.
[QUOTE=gman003-main;49092543]
*** Oh, and while I'm writing footnote after footnote, this kind of thing is not limited to only two threads per physical core. IBM's POWER architecture works very much like HyperThreading, but with four threads, and Sun's SPARC-T design uses something similar to how B!nary originally described things - processing an instruction from one thread out of eight, sequentially, skipping over any thread waiting on a memory operation to continue.[/QUOTE]
I believe POWER8 is going SMT8 if I remember correctly
[QUOTE=old_hag12;49092631]I believe POWER8 is going SMT8 if I remember correctly[/QUOTE]
You are correct, POWER8 moved up to eight threads per physical core. I did not know that.
I do have to wonder about how useful that is, because it doesn't look like it has significantly more execution units than Intel. They might be doing this mainly to keep the core processing when threads block on memory reads.
[QUOTE=gman003-main;49092845]You are correct, POWER8 moved up to eight threads per physical core. I did not know that.
I do have to wonder about how useful that is, because it doesn't look like it has significantly more execution units than Intel. They might be doing this mainly to keep the core processing when threads block on memory reads.[/QUOTE]
They are doing it because the power line is primarily used in their servers with a lot of small transactions, think dbs. I'm guessing that model probably wouldn't survive outside of the server world but I dunno...
-snip-
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